More PSP ASM help (msub.s and others)

Panajev2001a · Post by **Panajev2001a** » Sun Aug 28, 2005 5:33 am

/cygdrive/c/DOCUME~1/Panajev/LOCALS~1/Temp/ccefmJ9B.s:117: Error: unrecognized opcode `pmaxw $8,$8,$0'

/cygdrive/c/DOCUME~1/Panajev/LOCALS~1/Temp/ccefmJ9B.s:125: Error: unrecognized opcode `adda'

/cygdrive/c/DOCUME~1/Panajev/LOCALS~1/Temp/ccefmJ9B.s:126: Error: opcode not supported on this processor: allegrex (mips2) `msub.s $f0,$f13,$f0'

Now, I do understand that a MMI-EE core specific instruction such as pmaxw, but msub.s is MIPS I (is it really unsupported ?) and it gives me problems with adda.s which I write as "adda.s\t$f1, $f8\n"

Does anyone know why this happens ?

Post by **mrbrown** » Sun Aug 28, 2005 5:49 am

msub.s is not MIPS ISA 1, it's MIPS ISA 4. You want add.s instead of adda.s.

It looks as though you are trying to convert R5900 asm to ALLEGREX asm, and, well, that just won't work :).

Post by **mrbrown** » Sun Aug 28, 2005 5:50 am

mrbrown wrote:You want add.s instead of adda.s.

Actually, adda.s is adding to the accumulator from the msub.s instruction, so no, that's not supported either.

Panajev2001a · Post by **Panajev2001a** » Sun Aug 28, 2005 9:05 am

mrbrown wrote:msub.s is not MIPS ISA 1, it's MIPS ISA 4. You want add.s instead of adda.s.

Sorry, I went by the EE Instruction Manual which lists MSUB.S as MIPS I and not MIPS II, MIPS III or MIPS IV.

It looks as though you are trying to convert R5900 asm to ALLEGREX asm, and, well, that just won't work :).

Of course I was taking R5900 ASM as base, I said so in my post :D.

I am in the process of seeing what I can do to go around the problems, but I find hard to believe the R4000i in ALLEGREX does not have an ACCumulator register and thus it does not support instructions like adda.s or msub or madd (all require an accumulator unless the FMAC in the scalar FPU in ALLEGREX is really a FMADD unit... is it ?)...

Post by **mrbrown** » Sun Aug 28, 2005 9:36 am

Panajev2001a wrote:I am in the process of seeing what I can do to go around the problems, but I find hard to believe the R4000i in ALLEGREX does not have an ACCumulator register and thus it does not support instructions like adda.s or msub or madd (all require an accumulator unless the FMAC in the scalar FPU in ALLEGREX is really a FMADD unit... is it ?)...

Who knows? I don't have any official ALLEGREX documentation. I do know that the FPU is based off of the MIPS I ISA, and that the ALLEGREX is not a R4000 - it only borrows a few features from the R4000. The FPU does not support any multiply and add/subtract instructions, period.

The whole 'MIPS R4000' thing is just bad Sony marketing doing it's work, confusing people into thinking that they can pick up a R4000 manual and that's the ALLEGREX :). The ALLEGREX is a cut'n'paste job like the R5900 was - just not as goofy.

If you want a (almost) complete list of all of the ALLEGREX opcodes that we currently know about, grab the binutils 2.16 patch and look in opcodes/mips-opc.c. Any opcodes that have I1, I2, or AL in the last field are supported on the ALLEGREX.

Panajev2001a · Post by **Panajev2001a** » Sun Aug 28, 2005 4:33 pm

mrbrown wrote:
Panajev2001a wrote:I am in the process of seeing what I can do to go around the problems, but I find hard to believe the R4000i in ALLEGREX does not have an ACCumulator register and thus it does not support instructions like adda.s or msub or madd (all require an accumulator unless the FMAC in the scalar FPU in ALLEGREX is really a FMADD unit... is it ?)...
Who knows? I don't have any official ALLEGREX documentation. I do know that the FPU is based off of the MIPS I ISA, and that the ALLEGREX is not a R4000 - it only borrows a few features from the R4000. The FPU does not support any multiply and add/subtract instructions, period.

The whole 'MIPS R4000' thing is just bad Sony marketing doing it's work, confusing people into thinking that they can pick up a R4000 manual and that's the ALLEGREX :). The ALLEGREX is a cut'n'paste job like the R5900 was - just not as goofy.

If you want a (almost) complete list of all of the ALLEGREX opcodes that we currently know about, grab the binutils 2.16 patch and look in opcodes/mips-opc.c. Any opcodes that have I1, I2, or AL in the last field are supported on the ALLEGREX.

Thanks for the details, it kinda makes sense for the FPU to be that way when you have the VFPU sitting next to it... too bad we cannot use it yet :).