where to put patches for the toolchain? got a little one

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Npl
Posts: 5
Joined: Fri Apr 01, 2005 12:14 pm

where to put patches for the toolchain? got a little one

Post by Npl »

This patch adds support for __builtin_bswap32 .

Code: Select all

Index: patches/gcc-4.3.2-PSP.patch
===================================================================
--- patches/gcc-4.3.2-PSP.patch	(Revision 2469)
+++ patches/gcc-4.3.2-PSP.patch	(Arbeitskopie)
@@ -118,13 +118,12 @@
 +  [(set_attr "type"	"arith")
 +   (set_attr "mode"	"SI")])
 +
-+(define_insn "allegrex_wsbw"
++(define_insn "bswapsi2"
 +  [(set (match_operand:SI 0 "register_operand" "=d")
-+	(unspec:SI [(match_operand:SI 1 "register_operand" "d")]
-+		   UNSPEC_WSBW))]
++	(bswap:SI (match_operand:SI 1 "register_operand" "d")))]
 +  "TARGET_ALLEGREX"
 +  "wsbw\t%0,%1"
-+  [(set_attr "type"	"arith")
++  [(set_attr "type"	"shift")
 +   (set_attr "mode"	"SI")])
 +
 +
@@ -292,7 +291,7 @@
 +{
 +  DIRECT_ALLEGREX_BUILTIN(bitrev, MIPS_SI_FTYPE_SI, 0),
 +  DIRECT_ALLEGREX_BUILTIN(wsbh, MIPS_SI_FTYPE_SI, 0),
-+  DIRECT_ALLEGREX_BUILTIN(wsbw, MIPS_SI_FTYPE_SI, 0),
++  DIRECT_ALLEGREX_NAMED_BUILTIN(wsbw, bswapsi2, MIPS_SI_FTYPE_SI, 0),
 +  DIRECT_ALLEGREX_NAMED_BUILTIN(clz, clzsi2, MIPS_SI_FTYPE_SI, 0),
 +  DIRECT_ALLEGREX_BUILTIN(clo, MIPS_SI_FTYPE_SI, 0),
 +  DIRECT_ALLEGREX_NAMED_BUILTIN(ctz, ctzsi2, MIPS_SI_FTYPE_SI, 0),
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jimparis
Posts: 1145
Joined: Fri Jun 10, 2005 4:21 am
Location: Boston

Post by jimparis »

I think applying that would cause gcc-4.3.2-PSP.patch to apply with fuzz (you have to be careful when patching patches, better to regenerate the patch than to hand edit it).

I'm not familiar with gcc innards but it looks fine to me as long as it's been tested, and the patch is regenerated right.
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Npl
Posts: 5
Joined: Fri Apr 01, 2005 12:14 pm

Post by Npl »

you were right, patch dint work well. I redit the patch(-patch) and a fresh checkout now patches, compiles and works fine.

I added the svn-diff between code-tags, but since i dont trust that fully, I uploaded a zip which contains both the svn-diff and the whole modified patch.

Code: Select all

Index: patches/gcc-4.3.2-PSP.patch
===================================================================
--- patches/gcc-4.3.2-PSP.patch	(Revision 2472)
+++ patches/gcc-4.3.2-PSP.patch	(Arbeitskopie)
@@ -29,9 +29,9 @@
  		basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`
  		;;
 diff -burN orig.gcc-4.3.2/gcc/config/mips/allegrex.md gcc-4.3.2/gcc/config/mips/allegrex.md
---- orig.gcc-4.3.2/gcc/config/mips/allegrex.md	1969-12-31 20:00:00.000000000 -0400
-+++ gcc-4.3.2/gcc/config/mips/allegrex.md	2008-11-06 10:13:15.000000000 -0400
-@@ -0,0 +1,183 @@
+--- orig.gcc-4.3.2/gcc/config/mips/allegrex.md	1970-01-01 01:00:00.000000000 +0100
++++ gcc-4.3.2/gcc/config/mips/allegrex.md	2009-09-12 00:41:15.508144590 +0200
+@@ -0,0 +1,182 @@
 +;; Sony ALLEGREX instructions.
 +;; Copyright (C) 2005 Free Software Foundation, Inc.
 +;;
@@ -118,13 +118,12 @@
 +  [(set_attr "type"	"arith")
 +   (set_attr "mode"	"SI")])
 +
-+(define_insn "allegrex_wsbw"
++(define_insn "bswapsi2"
 +  [(set (match_operand:SI 0 "register_operand" "=d")
-+	(unspec:SI [(match_operand:SI 1 "register_operand" "d")]
-+		   UNSPEC_WSBW))]
++	(bswap:SI (match_operand:SI 1 "register_operand" "d")))]
 +  "TARGET_ALLEGREX"
 +  "wsbw\t%0,%1"
-+  [(set_attr "type"	"arith")
++  [(set_attr "type"	"shift")
 +   (set_attr "mode"	"SI")])
 +
 +
@@ -216,8 +215,8 @@
 +  [(set_attr "type"	"fcvt")
 +   (set_attr "mode"	"SF")])
 diff -burN orig.gcc-4.3.2/gcc/config/mips/mips.c gcc-4.3.2/gcc/config/mips/mips.c
---- orig.gcc-4.3.2/gcc/config/mips/mips.c	2008-07-12 05:00:46.000000000 -0300
-+++ gcc-4.3.2/gcc/config/mips/mips.c	2008-11-06 10:13:15.000000000 -0400
+--- orig.gcc-4.3.2/gcc/config/mips/mips.c	2008-07-12 10:00:46.000000000 +0200
++++ gcc-4.3.2/gcc/config/mips/mips.c	2009-09-12 00:43:25.596143113 +0200
 @@ -197,6 +197,12 @@
    /* As above, but the instruction only sets a single $fcc register.  */
    MIPS_BUILTIN_CMP_SINGLE,
@@ -292,7 +291,7 @@
 +{
 +  DIRECT_ALLEGREX_BUILTIN(bitrev, MIPS_SI_FTYPE_SI, 0),
 +  DIRECT_ALLEGREX_BUILTIN(wsbh, MIPS_SI_FTYPE_SI, 0),
-+  DIRECT_ALLEGREX_BUILTIN(wsbw, MIPS_SI_FTYPE_SI, 0),
++  DIRECT_ALLEGREX_NAMED_BUILTIN(wsbw, bswapsi2, MIPS_SI_FTYPE_SI, 0),
 +  DIRECT_ALLEGREX_NAMED_BUILTIN(clz, clzsi2, MIPS_SI_FTYPE_SI, 0),
 +  DIRECT_ALLEGREX_BUILTIN(clo, MIPS_SI_FTYPE_SI, 0),
 +  DIRECT_ALLEGREX_NAMED_BUILTIN(ctz, ctzsi2, MIPS_SI_FTYPE_SI, 0),
@@ -547,16 +546,15 @@
  #define HAVE_AS_TLS 0
  #endif
 diff -burN orig.gcc-4.3.2/gcc/config/mips/mips.md gcc-4.3.2/gcc/config/mips/mips.md
---- orig.gcc-4.3.2/gcc/config/mips/mips.md	2008-07-09 17:06:20.000000000 -0300
-+++ gcc-4.3.2/gcc/config/mips/mips.md	2008-11-06 10:13:15.000000000 -0400
-@@ -210,6 +210,19 @@
+--- orig.gcc-4.3.2/gcc/config/mips/mips.md	2008-07-09 22:06:20.000000000 +0200
++++ gcc-4.3.2/gcc/config/mips/mips.md	2009-09-12 00:41:58.052145997 +0200
+@@ -210,6 +210,18 @@
     (UNSPEC_DPAQX_SA_W_PH	446)
     (UNSPEC_DPSQX_S_W_PH		447)
     (UNSPEC_DPSQX_SA_W_PH	448)
 +
 +   ;; Sony ALLEGREX instructions
 +   (UNSPEC_WSBH 		449)
-+   (UNSPEC_WSBW 		450)
 +
 +   (UNSPEC_CLO			451)
 +   (UNSPEC_CTO			452)
@@ -569,7 +567,7 @@
    ]
  )
  
-@@ -1707,11 +1720,11 @@
+@@ -1707,11 +1719,11 @@
  	   (mult:DI
  	      (any_extend:DI (match_operand:SI 1 "register_operand" "d"))
  	      (any_extend:DI (match_operand:SI 2 "register_operand" "d")))))]
@@ -583,7 +581,7 @@
      return "msub<u>\t%1,%2";
    else
      return "msac<u>\t$0,%1,%2";
-@@ -1826,14 +1839,14 @@
+@@ -1826,14 +1838,14 @@
  	 &#40;mult&#58;DI &#40;any_extend&#58;DI &#40;match_operand&#58;SI 1 "register_operand" "d"&#41;&#41;
  		  &#40;any_extend&#58;DI &#40;match_operand&#58;SI 2 "register_operand" "d"&#41;&#41;&#41;
  	 &#40;match_operand&#58;DI 3 "register_operand" "0"&#41;&#41;&#41;&#93;
@@ -600,7 +598,7 @@
      return "madd<u>\t%1,%2";
    else
      /* See comment in *macc.  */
-@@ -2117,6 +2130,32 @@
+@@ -2117,6 +2129,32 @@
  ;;
  ;;  ....................
  ;;
@@ -633,7 +631,7 @@
  ;;	NEGATION and ONE'S COMPLEMENT
  ;;
  ;;  ....................
-@@ -2167,6 +2206,25 @@
+@@ -2167,6 +2205,25 @@
    &#91;&#40;set_attr "type" "logical"&#41;
     &#40;set_attr "mode" "<MODE>"&#41;&#93;&#41;
  
@@ -659,7 +657,7 @@
  ;;
  ;;  ....................
  ;;
-@@ -6031,7 +6089,7 @@
+@@ -6031,7 +6088,7 @@
  		 &#40;const_int 0&#41;&#93;&#41;
  	 &#40;match_operand&#58;GPR 2 "reg_or_0_operand" "dJ,0"&#41;
  	 &#40;match_operand&#58;GPR 3 "reg_or_0_operand" "0,dJ"&#41;&#41;&#41;&#93;
@@ -668,7 +666,7 @@
    "@
      mov%T4\t%0,%z2,%1
      mov%t4\t%0,%z3,%1"
-@@ -6061,8 +6119,12 @@
+@@ -6061,8 +6118,12 @@
  	&#40;if_then_else&#58;GPR &#40;match_dup 5&#41;
  			  &#40;match_operand&#58;GPR 2 "reg_or_0_operand"&#41;
  			  &#40;match_operand&#58;GPR 3 "reg_or_0_operand"&#41;&#41;&#41;&#93;
@@ -682,7 +680,7 @@
    mips_expand_conditional_move &#40;operands&#41;;
    DONE;
  &#125;&#41;
-@@ -6203,3 +6265,6 @@
+@@ -6203,3 +6264,6 @@
  
  ; MIPS fixed-point instructions.
  &#40;include "mips-fixed.md"&#41;
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jimparis
Posts: 1145
Joined: Fri Jun 10, 2005 4:21 am
Location: Boston

Post by jimparis »

Committed in rev 2473, thanks
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