VFPU - vbfy1.p/q, vbfy2.q : "butterfly" operation

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hlide
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VFPU - vbfy1.p/q, vbfy2.q : "butterfly" operation

Post by hlide »

Hi,

I made some test and found out that they are "butterfly" operations like in idct :

Code: Select all

vbtf1.q/p vd, vs :
{
	vd[i+0] = vs[i+0] + vs[i+1];
	vd[i+1] = vs[i+0] - vs[i+1];
}

vbtf2.q vd, vs :
{
	vd[0] = vs[0] + vs[2];
	vd[1] = vs[1] + vs[3];
	vd[2] = vs[0] - vs[2];
	vd[3] = vs[1] - vs[3];
}

vbtf2.q vd, vs[0, 2, 1, 3] :
{
	vd[0] = vs[0] + vs[1];
	vd[1] = vs[2] + vs[3];
	vd[2] = vs[0] - vs[1];
	vd[3] = vs[2] - vs[3];
}

Enjoy !
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Raphael
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Post by Raphael »

Oh my god! Very nice finding there! Thanks a lot! :D
<Don't push the river, it flows.>
http://wordpress.fx-world.org - my devblog
http://wiki.fx-world.org - VFPU documentation wiki

Alexander Berl
hlide
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Post by hlide »

hi Raphael,

do you know what those vfpu conditions are ?
"FL" : ?
"EQ" : ==
"LT" : <
"LE" : <=
"TR" : ?
"NE" : !=
"GE" : >=
"GT" : >
"EZ" : == 0.0 ?
"EN" : == NaN ?
"EI" : == Inf ?
"ES" : same sign ?
"NZ" : != 0.0 ?
"NN" : != NaN ?
"NI" : != Inf ?
"NS" : not same sign ?

Do you know how to detect if a float has an overflow (without trap ?)

i'm trying to map GTE operations on VFPU operations and need to report overflow as GTE does. So I need to test if a float overflowed and set a specific bit in GTE FLAGS.

Yes I know GTE computes up to 44 bits precision but i want to try it using VFPU at all and see what happens.

I have mostly a working R3000AF dynamic recompiler without cop0 and cop2 (gte), so I'm trying to have a gte dynamic recompiler too.
Last edited by hlide on Sun Oct 29, 2006 10:28 am, edited 1 time in total.
Insert_witty_name
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Post by Insert_witty_name »

You have GE and GT the wrong way around.
hlide
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Post by hlide »

Insert_witty_name wrote:You have GE and GT the wrong way around.
are you sure ? ;P
Insert_witty_name
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Post by Insert_witty_name »

Damn the power of the edit button!
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Raphael
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Post by Raphael »

I only can confirm the following:
"FL" : ?
"EQ" : ==
"LT" : <
"LE" : <=
"TR" : ?
"NE" : !=
"GE" : >=
"GT" : >
"EZ" : == 0.0
"EN" : == NaN
"EI" : == Inf
"NZ" : != 0.0
"NN" : != NaN
"NI" : != Inf

Regarding the other I can only guess:
"TR" : True?
"FL" : False?
Do you know how to detect if a float has an overflow (without trap ?)

i'm trying to map GTE operations on VFPU operations and need to report overflow as GTE does. So I need to test if a float overflowed and set a specific bit in GTE FLAGS.
Sorry, don't know that.

I'm still amazed about those butterfly functions, I never thought there could have been something like that. Those will be very handy for doing FFT for my audio analyzer and (i)DCTs (for ffmpeg and maybe even for madlib) with VFPU. Thanks again :)
<Don't push the river, it flows.>
http://wordpress.fx-world.org - my devblog
http://wiki.fx-world.org - VFPU documentation wiki

Alexander Berl
hlide
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Joined: Sun Sep 10, 2006 2:31 am

Post by hlide »

that's why I posted it ;)
Tinnus
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Post by Tinnus »

hlide, you could always check the overflows in software (ie: moving the results to the GPRs then checking by hand).

That would seem too slow at first, but you could try and hide some MIPS ops in the VFPU latency slots :)
Let's see what the PSP reserves... well, I'd say anything is better than Palm OS.
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Raphael
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Post by Raphael »

Could it be that "ES" is "equal NAN or INF" (and NS the opposite), meaning the exponent bits are all ones? Can you verify that?
<Don't push the river, it flows.>
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http://wiki.fx-world.org - VFPU documentation wiki

Alexander Berl
hlide
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Post by hlide »

Raphael wrote:Could it be that "ES" is "equal NAN or INF" (and NS the opposite), meaning the exponent bits are all ones? Can you verify that?
well i found a better way to handle GTE flags with VFPU if i'm not wrong...

Code: Select all

viim.s S011, 16384 # 1<<&#40;26-12&#41;
viim.s S010, 8192 # 1<<&#40;25-12&#41;
vadd.s S012, S011, S011 # 1<<&#40;27-12&#41;
viim.s S000, 8
vscl.t C000, C010, S000 # &#91;1<<&#40;30-12&#41;,1<<&#40;29-12&#41;,1<<&#40;28-12&#41;&#93;

lvi.t C020, &#91;-MIN_MAC1, -MIN_MAC2, -MIN_MAC3&#93; # gaaah lvi.t is unimplemented even it is present in opc-mips.c &#58;&#40;&#40;&#40;
lvi.t C030, &#91;+MAX_MAC1, +MAX_MAC2, +MAX_MAC3&#93;

vslt.t C020, C130, C020 # cn&#91;i&#93; = MAC&#91;i&#93; < -MIN_MACi ? 1.0 &#58; 0.0
vsge.t C030, C130, C030 # cp&#91;i&#93; = MAC&#91;i&#93; >= +MAX_MACi ? 1.0 &#58; 0.0

vdot.t S100, C020, C000 # Ap = &#40;cp&#91;0&#93; * 1<<&#40;30-12-i&#41;&#41; + &#40;cp&#91;1&#93; * 1<<&#40;29-12-i&#41;&#41; + &#40;cp&#91;2&#93; * 1<<&#40;28-12-i&#41;&#41;
vdot.t S133, C030, C010 # An = &#40;cn&#91;0&#93; * 1<<&#40;27-12-i&#41;&#41; + &#40;cn&#91;1&#93; * 1<<&#40;26-12-i&#41;&#41; + &#40;cn&#91;2&#93; * 1<<&#40;25-12-i&#41;&#41;
vadd.s S133, S100, S133 # &#40;FLAGS >> 12&#41; = &#40;An + Ap&#41;;
...
too funny to use vdot.t to merge bits :)

to answer your question, i'm too busy :/
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