allegrex full instruction set

[serige]

hi,
I am looking at some psp assembly code, and I come across some unfamiliar instructions:

ins $s0, $zr, 0, 4
bnezl $s1, loc_00133D0C <--- a branch obviously, but not exactly sure what it does

can anyone tell me what are they? it would be nice if someone can give me the full instruction set (with explanations) so that i can look them up myself.

[hlide]

ins $s0, $zr, 0, 4
bnezl $s1, loc_00133D0C <--- a branch obviously, but not exactly sure what it does

you can find those instructions in MIPS32 R2 documentation

ins $s0, $zr, 0, 4 ===> s0.bits[0..3] = 0;

branch has a delay slot (that is an instruction which follows the branch instruction) which is executed before jumping to target address

usually the instruction in the delay slot is always executed regardless whether the branch is taken (conditionnal branching).

But if a conditional branch has a 'l' suffix (which means 'likely') the instruction in the delay slot is executed if the branch is taken or skipped if not taken.

so if you have this :

bnezl $s1, loc
move $v0, $s1
===>
if (s1 != 0) { v0 = s1; goto loc; }

bnez $s1, loc
move $s1, $v0
===>
tmp = s1; s1 = v0; if (tmp != 0) { goto loc; }

beq r1, r2, loc : (r1 == r2)
bne r1, r2, loc : (r1 != r2)
beqz r1, loc : (r1 == 0)
bnez r1, loc : (r1 != 0)
bltz r1, loc : (r1 < 0)
bgez r1, loc : (r1 >= 0)
etc.

[serige]

i am not sure if i got the ins instruction right

ins $1 $2 x y
so what it does it to clobber the the bits from index x to y-1 of the first register with that of the second register?

it doesn't seem I was able to find any info on this instruction from my google searches about the MIPS32 R2 documentation.

Thanks

[serige]

found it, thanks a lot!

[moonlight]

i am not sure if i got the ins instruction right

ins $1 $2 x y
so what it does it to clobber the the bits from index x to y-1 of the first register with that of the second register?

it doesn't seem I was able to find any info on this instruction from my google searches about the MIPS32 R2 documentation.

Thanks

Almost. It inserts y bits of $2 at the position x of $1.
Examples:

ins v0, v1, 0, 4 -> is equivalent to v0 = v0 | (v1 & 0xF)
ins v0, v1, 3, 9 -> equvialent to v0 = (v0 & 0xFFFFF007) | ((v1 & 0x1FF) << 3)

Too bad the psp sdk doesn't have a bulitin func for it.

Anyways I uploaded to you the mips doc i had somewhere:
http://rapidshare.com/files/72446657/Mi ... e.pdf.html

It may miss some psp instruction like max and min, but ins, ext, seh, seb, etc should be there.

[serige]

can you use something like 'asm{ins v0, v1, 0, 4};' to execute this instruction?
i dont have the sdk installed in my computer anymore i can't verify this...

[serige]

i am not sure if i got the ins instruction right

ins $1 $2 x y
so what it does it to clobber the the bits from index x to y-1 of the first register with that of the second register?

it doesn't seem I was able to find any info on this instruction from my google searches about the MIPS32 R2 documentation.

Thanks

Almost. It inserts y bits of $2 at the position x of $1.
Examples:

ins v0, v1, 0, 4 -> is equivalent to v0 = v0 | (v1 & 0xF)
ins v0, v1, 3, 9 -> equvialent to v0 = (v0 & 0xFFFFF007) | ((v1 & 0x1FF) << 3)

Too bad the psp sdk doesn't have a bulitin func for it.

Anyways I uploaded to you the mips doc i had somewhere:
http://rapidshare.com/files/72446657/Mi ... e.pdf.html

It may miss some psp instruction like max and min, but ins, ext, seh, seb, etc should be there.

Thanks a lot for your pdf!

[Raphael]

can you use something like 'asm{ins v0, v1, 0, 4};' to execute this instruction?
i dont have the sdk installed in my computer anymore i can't verify this...

http://www.ibiblio.org/gferg/ldp/GCC-In ... HOWTO.html

[moonlight]

It's a pity that instructions such as ins and ext don't have a builtin in the pspsdk, while other less useful like seb and seh have them.

[hlide]

can you use something like 'asm{ins v0, v1, 0, 4};' to execute this instruction?
i dont have the sdk installed in my computer anymore i can't verify this...

http://www.ibiblio.org/gferg/ldp/GCC-In ... HOWTO.html

Code: Select all

#define __asm_ins(rt, rs, lsb, len) \
  ({ \
    int res = rt; \
    __asm__ __volatile__ ( \
      "ins %0, %1, %2, %3" \
      : "+r"(res) /* output */ \
      : "r"(rs), "i"(lsb), "i"(len) /* input */ \
    ); \
    res; /* returns res */  \
  })

can be used this way :

int z = __asm_ins(x, y, 0, 4);

note that y can be a constant like __builtin_ins(x, 0, 0, 4);

and x and y can also be a complex expression like :

Code: Select all

  rgb565 = __asm_ins(
             __asm_ins((r8>>3), (g8>>2), 5, 6),
               (b8>>3), 5+6, 5
           );

[fungos]

Just for comparission:

http://forums.amd.com/devblog/blogpost. ... &catid=271

[J.F.]

Just for comparission:

http://forums.amd.com/devblog/blogpost. ... &catid=271

Or the 68020 from 20 years ago:

http://68k.hax.com/BFINS
http://68k.hax.com/BFEXTU