ME System Counter

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skov
Posts: 2
Joined: Sun Jan 07, 2007 6:22 am

ME System Counter

Post by skov »

I wrote a program that reads the COP0 status registers of the Media Engine and much to my surprise register 9 the system counter seems to be constant.

Is there something you need to do to start the counter?
hlide
Posts: 739
Joined: Sun Sep 10, 2006 2:31 am

Re: ME System Counter

Post by hlide »

skov wrote:I wrote a program that reads the COP0 status registers of the Media Engine and much to my surprise register 9 the system counter seems to be constant.

Is there something you need to do to start the counter?
COP0 of Media Engine doesn't seem to be a full-fledged cop0. I'm not even sure there is a running system counter.

Nonetheless here is what is said about the counter and compare registers :
The count register contains a value that increments once every clock cycle. The count register is normally
only written for initialization and test purposes. A timer interrupt is flagged in ip7 in the cause register
when the count register reaches the same value as the compare register. The interrupt will only be taken
if both im7 and iec in the status register are set. The timer interrupt flag in ip7 can only be cleared by
writing the compare register. The compare register is usually only read for test purposes.
So, assuming the counter and compare registers are working on Media Engine processor, if the compare register is 0 and the count register is reset to 0 when reaching the same value as the compare register, it is normal that the counter register is always 0. Probably by setting the compare register with a big value may help you to determine if the counter register really increments once every clock cycle. Of course, be sure that both im7 and iec in the status register are not set to avoid interrupts when testing it.
hlide
Posts: 739
Joined: Sun Sep 10, 2006 2:31 am

Post by hlide »

humm, here is what i get :

1) mtc0(11, 0x80000000); -> set compare whereas counter it sticks at 0 --> nothing happens

2) mtc0(11, 0x10000000); mtc0(9, 0x80000000); -> set compare and counter --> counter = 0x800001F8 so it increments well

3) mtc0(11, 0x80000000); mtc0(9, 0x10000000); -> set compare and counter --> counter = 0x10000214 so it increments well

4) mtc0(11, 0x80000000); mtc0(9, 0x00000000); -> set compare and counter --> counter = 0x000001E4 so it increments well

another test :

Code: Select all

void me_test_counter(int param)
{
  volatile unsigned int *pctr1 = (volatile unsigned int *)(((int)&g_counter1)|0x40000000);
  volatile unsigned int *vptr1 = (volatile unsigned int *)((int)g_data|0x40000000);

loop:
  while (!(*pctr1));

  me_enter_critical_session();

  mtc0(11, 0xffffffff - 1);
  mtc0(9, 0xffffffff - 512);

  if (*pctr1)
  {
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    *vptr1++ = mfc0(9);
    
    *pctr1 = 0;
  }

  me_leave_critical_session();
 
  goto loop; 
}
the result clearly shows that when counter register has the same value as the compare register, the counter register is not affected.

so here my conclusion :

- counter or compare should be set at a value to start counting
- compare matching does not affect counter apparently except that it triggers an irq.
hlide
Posts: 739
Joined: Sun Sep 10, 2006 2:31 am

Post by hlide »

great ! timer interrupt works too on ME processor ! it calls my interrupt handler when counter == compare.

now i feel it possible to test the famous int 31 to signal ME.
skov
Posts: 2
Joined: Sun Jan 07, 2007 6:22 am

Post by skov »

Thanks a lot, it works for me now
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